Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors
The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient condition studies of the hysteresis behavior and capacitance-voltage characteristics on si...
| Main Authors: | , , , , , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2012
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| Online Access: | https://hdl.handle.net/10356/98488 http://hdl.handle.net/10220/8063 |
| _version_ | 1811697285653856256 |
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| author | Cahyadi, Tommy Tan, H. S. Mhaisalkar, Subodh Gautam Lee, Pooi See Boey, Freddy Yin Chiang Chen, Z. K. Ng, C. M. Rao, V. R. Qi, Guojun |
| author2 | School of Materials Science & Engineering |
| author_facet | School of Materials Science & Engineering Cahyadi, Tommy Tan, H. S. Mhaisalkar, Subodh Gautam Lee, Pooi See Boey, Freddy Yin Chiang Chen, Z. K. Ng, C. M. Rao, V. R. Qi, Guojun |
| author_sort | Cahyadi, Tommy |
| collection | NTU |
| description | The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient
condition studies of the hysteresis behavior and capacitance-voltage characteristics on single layer and varying thicknesses of bilayer dielectrics confirmed that blocking layers of thermal oxide could
effectively eliminate the electret induced hysteresis, and that thin (25 nm) sol-gel silica dielectrics
enabled elimination of nanopores thus realizing stable device characteristics under ambient
conditions. |
| first_indexed | 2024-10-01T07:52:50Z |
| format | Journal Article |
| id | ntu-10356/98488 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:52:50Z |
| publishDate | 2012 |
| record_format | dspace |
| spelling | ntu-10356/984882023-07-14T15:54:45Z Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors Cahyadi, Tommy Tan, H. S. Mhaisalkar, Subodh Gautam Lee, Pooi See Boey, Freddy Yin Chiang Chen, Z. K. Ng, C. M. Rao, V. R. Qi, Guojun School of Materials Science & Engineering DRNTU::Engineering::Materials The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient condition studies of the hysteresis behavior and capacitance-voltage characteristics on single layer and varying thicknesses of bilayer dielectrics confirmed that blocking layers of thermal oxide could effectively eliminate the electret induced hysteresis, and that thin (25 nm) sol-gel silica dielectrics enabled elimination of nanopores thus realizing stable device characteristics under ambient conditions. Published version 2012-05-17T06:34:22Z 2019-12-06T19:55:55Z 2012-05-17T06:34:22Z 2019-12-06T19:55:55Z 2007 2007 Journal Article Cahyadi, T., Tan, H. S., Mhaisalkar, S. G., Lee, P. S., Boey, F. Y. C., Chen, Z. K., et al. (2007). Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors. Applied Physics Letters, 91(24). https://hdl.handle.net/10356/98488 http://hdl.handle.net/10220/8063 10.1063/1.2821377 en Applied physics letters © 2007 American Institute of Physics. This paper was published in Applied Physics Letters and is made available as an electronic reprint (preprint) with permission of American Institute of Physics. The paper can be found at the following official URL: http://dx.doi.org/10.1063/1.2821377. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law. application/pdf |
| spellingShingle | DRNTU::Engineering::Materials Cahyadi, Tommy Tan, H. S. Mhaisalkar, Subodh Gautam Lee, Pooi See Boey, Freddy Yin Chiang Chen, Z. K. Ng, C. M. Rao, V. R. Qi, Guojun Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors |
| title | Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors |
| title_full | Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors |
| title_fullStr | Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors |
| title_full_unstemmed | Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors |
| title_short | Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors |
| title_sort | electret mechanism hysteresis and ambient performance of sol gel silica gate dielectrics in pentacene field effect transistors |
| topic | DRNTU::Engineering::Materials |
| url | https://hdl.handle.net/10356/98488 http://hdl.handle.net/10220/8063 |
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