A 1.2 V 2.4 GHz low spur CMOS PLL synthesizer with a gain boosted charge pump for a batteryless transceiver

A 1.2 V 2.4 GHz low spur CMOS PLL synthesizer with a gain boosted charge pump for a batteryless transceiver

This paper presents a low power 1.2 V, 2.4 GHz low spur, Quadrature PLL synthesizer for IEEE 802.15.4 batteryless transceiver in CMOS 0.18 μm technology. The PLL employs a 1 MHz fully programmable divider with an improved CML 2/3 prescaler, a novel bit-cell for the programmable counters and a novel...

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Bibliographic Details
Main Authors: Boon, Chirn Chye, Krishna, M. Vamshi, Do, Manh Anh, Yeo, Kiat Seng, Do, Aaron V., Wong, T. S.
Other Authors: School of Electrical and Electronic Engineering
Format: Conference Paper
Language:English
Published: 2013
Subjects:
DRNTU::Engineering::Electrical and electronic engineering
Online Access:https://hdl.handle.net/10356/98803
http://hdl.handle.net/10220/12776

Internet

https://hdl.handle.net/10356/98803
http://hdl.handle.net/10220/12776

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