Hardware prototyping of an efficient encryption engine
An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can be fitted into the...
| Egile Nagusiak: | , , |
|---|---|
| Formatua: | Liburu kapitulua |
| Hizkuntza: | English |
| Argitaratua: |
IIUM Press
2009
|
| Gaiak: | |
| Sarrera elektronikoa: | http://irep.iium.edu.my/7107/1/Hardware_Prototyping_of_an_Efficient_Encryption_Engine.pdf |