FOSS Compact Model Prototyping with Verilog-A Equation-Defined Devices (VAEDD)
Equation-Defined Device models (EDD) have become very popular for behavioural modelling of semiconductor and other non-linear devices. Two feature that makes them particularly attractive are their interactive nature and easy testing during the model development process. However, they are less suited...
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| Format: | Conference or Workshop Item |
| Language: | English English |
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IEEE
2019
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| Online Access: | https://repository.londonmet.ac.uk/5237/1/MIXDESSlides2019.pdf https://repository.londonmet.ac.uk/5237/7/mixdes2019.pdf |