Z domain delay subcircuits and compact Verilog-A macromodels for mixed-mode sampled data circuit simulation
Mixed-mode simulation is an important circuit design and system testing tool for established and emerging semiconductor sampled data technologies. This paper describes a number of functional, computationally efficient, Z domain delay models, outlining the role of current and charge equations in the...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Test Technology Technical Council (TTTC) of the IEEE Computer Society.
2009
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| Subjects: | |
| Online Access: | https://repository.londonmet.ac.uk/5255/1/JRadInfo_Brinson.pdf |