A 100GB/s wide I/O with 4096b TSVs through an active silicon interposer with in-place waveform capturing
Three dimensional (3D) stacking of memory chips is a promising direction for implementing memory systems in mobile applications [1-2] and for low-cost high-performance computation [3]. The requirements are extremely low power consumption, high data bandwidth, stability and scalability of operation,...
Main Authors: | , , , , , , |
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Format: | Conference item |
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2013
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