Pipeline quantum processor architecture for silicon spin qubits
We propose a quantum processor architecture, the qubit ‘pipeline’, in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling...
| Autores principales: | , , , , , |
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| Formato: | Journal article |
| Lenguaje: | English |
| Publicado: |
Springer Nature
2024
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