Pipeline quantum processor architecture for silicon spin qubits
We propose a quantum processor architecture, the qubit ‘pipeline’, in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling...
Main Authors: | Patomäki, SM, Gonzalez-Zalba, MF, Fogarty, MA, Cai, Z, Benjamin, SC, Morton, JJL |
---|---|
Format: | Journal article |
Language: | English |
Published: |
Springer Nature
2024
|
Similar Items
-
Pipeline quantum processor architecture for silicon spin qubits
by: S. M. Patomäki, et al.
Published: (2024-03-01) -
Coherence of spin qubits in silicon
by: Tyryshkin, A, et al.
Published: (2006) -
Coherence of spin qubits in silicon
by: Tyryshkin, A, et al.
Published: (2006) -
A single-atom electron spin qubit in silicon.
by: Pla, J, et al.
Published: (2012) -
A shuttling-based two-qubit logic gate for linking distant silicon quantum processors
by: Akito Noiri, et al.
Published: (2022-09-01)