Cita APA (7th ed.)

Haller, L., & Singh, S. (2010). Relieving capacity limits on FPGA−based SAT−solvers.

Cita Chicago (17th ed.)

Haller, L., i S. Singh. Relieving Capacity Limits on FPGA−based SAT−solvers. 2010.

Cita MLA (9th ed.)

Haller, L., i S. Singh. Relieving Capacity Limits on FPGA−based SAT−solvers. 2010.