End-to-end formal verification of a RISC-V processor extended with capability pointers

End-to-end formal verification of a RISC-V processor extended with capability pointers

Capability Hardware Enhanced RISC Instructions (CHERI) extend conventional ISAs with capabilities that can enable fine-grained memory protection and scalable software compartmentalisation. CHERI-RISC-V is an extended version of the RISC-V ISA with support for CHERI, and Flute is an open-source 64-bi...

Bibliografski detalji
Glavni autori:	Gao, D, Melham, T
Format:	Conference item
Jezik:	English
Izdano:	TU Wien Academic Press/IEEE 2021

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