Synthesising Optimal Timing Delays for Timed I/O Automata
In many real-time embedded systems, the choice of values for the timing delays can crucially a ect the safety or quantitative charac- teristics of their execution. We propose a parameter synthesis algorithm that nds optimal timing delays guaranteeing that the system satis es a given quantitative pro...
| প্রধান লেখক: | , , , |
|---|---|
| বিন্যাস: | Report |
| প্রকাশিত: |
DCS
2014
|