Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates
We show that deep level doping of Czochralski-grown silicon wafers is capable of providing high resistivity handle wafers suitable for radio frequency integrated circuits, in particular integrated passive devices (IPD) and 3D integration. Starting from n-type 50 Ωcm Czochralski silicon wafers, we us...
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2011
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author | Mallik, K Abuelgasim, A Ashburn, P Groot, D Wilshaw, P |
author_facet | Mallik, K Abuelgasim, A Ashburn, P Groot, D Wilshaw, P |
author_sort | Mallik, K |
collection | OXFORD |
description | We show that deep level doping of Czochralski-grown silicon wafers is capable of providing high resistivity handle wafers suitable for radio frequency integrated circuits, in particular integrated passive devices (IPD) and 3D integration. Starting from n-type 50 Ωcm Czochralski silicon wafers, we use Au ion implantation and subsequent annealing to increase the resistivity of the wafers to over 10 k Ωcm at room temperatures in a controlled way. Coplanar waveguides fabricated on the implanted wafers show strongly reduced attenuation. Electromagnetic Simulations indicate that the quality factor of spiral inductors can be doubled if the high resistive layer is at least 100μm deep. © 2011 EUROPEAN MICROWAVE ASSOC. |
first_indexed | 2024-03-07T02:27:31Z |
format | Conference item |
id | oxford-uuid:a6200b40-c256-4ac0-b62c-c7fb773d3d86 |
institution | University of Oxford |
last_indexed | 2024-03-07T02:27:31Z |
publishDate | 2011 |
record_format | dspace |
spelling | oxford-uuid:a6200b40-c256-4ac0-b62c-c7fb773d3d862022-03-27T02:45:02ZDeep level impurity engineered semi-insulating Cz-silicon as microwave substratesConference itemhttp://purl.org/coar/resource_type/c_5794uuid:a6200b40-c256-4ac0-b62c-c7fb773d3d86Symplectic Elements at Oxford2011Mallik, KAbuelgasim, AAshburn, PGroot, DWilshaw, PWe show that deep level doping of Czochralski-grown silicon wafers is capable of providing high resistivity handle wafers suitable for radio frequency integrated circuits, in particular integrated passive devices (IPD) and 3D integration. Starting from n-type 50 Ωcm Czochralski silicon wafers, we use Au ion implantation and subsequent annealing to increase the resistivity of the wafers to over 10 k Ωcm at room temperatures in a controlled way. Coplanar waveguides fabricated on the implanted wafers show strongly reduced attenuation. Electromagnetic Simulations indicate that the quality factor of spiral inductors can be doubled if the high resistive layer is at least 100μm deep. © 2011 EUROPEAN MICROWAVE ASSOC. |
spellingShingle | Mallik, K Abuelgasim, A Ashburn, P Groot, D Wilshaw, P Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates |
title | Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates |
title_full | Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates |
title_fullStr | Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates |
title_full_unstemmed | Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates |
title_short | Deep level impurity engineered semi-insulating Cz-silicon as microwave substrates |
title_sort | deep level impurity engineered semi insulating cz silicon as microwave substrates |
work_keys_str_mv | AT mallikk deeplevelimpurityengineeredsemiinsulatingczsiliconasmicrowavesubstrates AT abuelgasima deeplevelimpurityengineeredsemiinsulatingczsiliconasmicrowavesubstrates AT ashburnp deeplevelimpurityengineeredsemiinsulatingczsiliconasmicrowavesubstrates AT grootd deeplevelimpurityengineeredsemiinsulatingczsiliconasmicrowavesubstrates AT wilshawp deeplevelimpurityengineeredsemiinsulatingczsiliconasmicrowavesubstrates |