Design and Verification of On−Chip Communication Protocols

Design and Verification of On−Chip Communication Protocols

अन्य संस्करण दिखाएं (2)

ग्रंथसूची विवरण
मुख्य लेखकों:	Böhm, P, Melham, T
स्वरूप:	Conference item
प्रकाशित:	ETAPS 2008 2008

समान संसाधन

Design and Verification of On−Chip Communication Protocols
द्वारा: Böhm, P, और अन्य
प्रकाशित: (2015)

Design and Verification of On−Chip Communication Protocols
द्वारा: Böhm, P, और अन्य
प्रकाशित: (2015)

A Refinement Approach to Design and Verification of On−Chip Communication Protocols
द्वारा: Böhm, P, और अन्य
प्रकाशित: (2008)

A Refinement Approach to Design and Verification of On−Chip Communication Protocols
द्वारा: Böhm, P, और अन्य
प्रकाशित: (2008)

A Refinement Approach to Design and Verification of On-Chip Communication Protocols
द्वारा: Boehm, P, और अन्य
प्रकाशित: (2008)

A Framework for Incremental Modelling and Verification of On−Chip Protocols
द्वारा: Böhm, P
प्रकाशित: (2010)

Verification of System on Chip Integrated Communication Controllers
द्वारा: M. V. Petrochenkov, और अन्य
प्रकाशित: (2018-10-01)

Abstraction Mechanisms for Hardware Verification
द्वारा: Melham, T
प्रकाशित: (1990)

Abstraction Mechanisms for Hardware Verification
द्वारा: Melham, T
प्रकाशित: (1988)

Abstraction Mechanisms for Hardware Verification
द्वारा: Melham, T
प्रकाशित: (1987)

Higher Order Logic and Hardware Verification
द्वारा: Melham, T
प्रकाशित: (1993)

A Formalised Framework for Incremental Modelling of On−Chip Communication
द्वारा: Böhm, P
प्रकाशित: (2010)

Practical Formal Verification in Microprocessor Design
द्वारा: Jones, R, और अन्य
प्रकाशित: (2015)

Abstract: Experience with Practical Formal Verification at an Industrial Scale
द्वारा: Melham, T
प्रकाशित: (2003)

Relational STE and Theorem Proving for Formal Verification of Industrial Circuit Designs
द्वारा: O'Leary, J, और अन्य
प्रकाशित: (2013)

Relational STE and theorem proving for formal verification of industrial circuit designs
द्वारा: O'Leary, J, और अन्य
प्रकाशित: (2013)

Formalizing Abstraction Mechanisms for Hardware Verification in Higher Order Logic
द्वारा: Melham, T
प्रकाशित: (1989)

Contextualizing formal verification for systems security engineering
द्वारा: Shaked, A, और अन्य
प्रकाशित: (2024)

An AMBA−ARM7 Formal Verification Platform
द्वारा: Susanto, K, और अन्य
प्रकाशित: (2003)

MODELLING AND VERIFICATION OF KITSAT PACKET COMMUNICATION PROTOCOLS
द्वारा: Young-Ro Lee, और अन्य
प्रकाशित: (1996-06-01)

Design and post-silicon verification of polymorphic PCIE bridge expansion chip
द्वारा: Deng Jiawei, और अन्य
प्रकाशित: (2023-02-01)

Hardware/Software Implementation of a Chip-to-Chip Communication Protocol Based on SPDM
द्वारा: Kais Belwafi, और अन्य
प्रकाशित: (2024-01-01)

Hardware verification using software analyzers
द्वारा: Mukherjee, R, और अन्य
प्रकाशित: (2015)

Hardware Verification by Formal Proof
द्वारा: Birtwistle, G, और अन्य
प्रकाशित: (1988)

Hardware Verification by Formal Proof
द्वारा: Birtwistle, G, और अन्य
प्रकाशित: (1988)

Hardware Verification using Higher−Order Logic
द्वारा: Camilleri, A, और अन्य
प्रकाशित: (1986)

Hardware Verification using Higher−Order Logic
द्वारा: Camilleri, A, और अन्य
प्रकाशित: (1987)

A formal CHERI-C semantics for verification
द्वारा: Park, SH, और अन्य
प्रकाशित: (2023)

Microfluidic System Protocols for Integrated On-Chip Communications and Cooling
द्वारा: Stefanus A. Wirdatmadja, और अन्य
प्रकाशित: (2017-01-01)

Design and implementation of adaptive and synchronous test function of chip sample verification platform
द्वारा: Xu Jinglin, और अन्य
प्रकाशित: (2023-02-01)

An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation
द्वारा: German Cano-Quiveu, और अन्य
प्रकाशित: (2021-01-01)

Unbounded Safety Verification for Hardware Using Software Analyzers
द्वारा: Mukherjee, R, और अन्य
प्रकाशित: (2015)

End-to-end formal verification of a RISC-V processor extended with capability pointers
द्वारा: Gao, D, और अन्य
प्रकाशित: (2021)

Method for reducing the complexity of clock domain crossing design and its verification in system-on-chips
द्वारा: Dan LIU, और अन्य
प्रकाशित: (2012-11-01)

Method for reducing the complexity of clock domain crossing design and its verification in system-on-chips
द्वारा: Dan LIU, और अन्य
प्रकाशित: (2012-11-01)

Verification methods for complex-functional blocks in CAD for chips deep submicron design standards
द्वारा: Zolnikov Vladimir, और अन्य
प्रकाशित: (2023-01-01)

Design and verification of adaptive cache coherence protocols
द्वारा: Shen, Xiaowei, 1966-
प्रकाशित: (2014)

Effective verification for low-level software with competing interrupts
द्वारा: Liang, L, और अन्य
प्रकाशित: (2017)

Lifting CDCL to template-based abstract domains for program verification
द्वारा: Mukherjee, R, और अन्य
प्रकाशित: (2017)

Verification of an artificial intelligence vision chip design for edge computing based on hardware simulation system
द्वारा: Xuanzhe XU, और अन्य
प्रकाशित: (2022-03-01)