Word level predicate abstraction and refinement for verifying RTL verilog

Word level predicate abstraction and refinement for verifying RTL verilog

Εμφάνιση άλλων εκδόσεων (2)

Model checking techniques applied to large industrial circuits suffer from the state space explosion problem. A major technique to address this problem is abstraction. The most commonly used abstraction technique for hardware verification is localization reduction, which removes latches that are not...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς:	Jain, H, Sharygina, N, Kroening, D, Clarke, E
Άλλοι συγγραφείς:	Jr, W
Μορφή:	Conference item
Έκδοση:	Association for Computing Machinery 2005

Παρόμοια τεκμήρια

Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog
ανά: Jain, H, κ.ά.
Έκδοση: (2005)

Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog
ανά: Jain, H, κ.ά.
Έκδοση: (2008)

Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog.
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Word-level predicate-abstraction and refinement rechniques for verifying RTL Verilog
ανά: Jain, H, κ.ά.
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Image Computation and Predicate Refinement for RTL Verilog using Word Level Proofs
ανά: Kroening, D, κ.ά.
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VCEGAR: Verilog CounterExample Guided Abstraction Refinement
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Verification of SpecC and Verilog using Predicate Abstraction
ανά: Jain, H, κ.ά.
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Checking consistency of C and Verilog using predicate abstraction and induction
ανά: Kroening, D, κ.ά.
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Checking Consistency of C and Verilog using Predicate Abstraction and Induction
ανά: Kroening, D, κ.ά.
Έκδοση: (2004)

Predicate abstraction of ANSI-C programs using SAT
ανά: Clarke, E, κ.ά.
Έκδοση: (2004)

SATABS: SAT−based Predicate Abstraction for ANSI−C
ανά: Clarke, E, κ.ά.
Έκδοση: (2005)

Predicate Abstraction of ANSI–C Programs using SAT
ανά: Clarke, E, κ.ά.
Έκδοση: (2015)

Predicate Abstraction of ANSI-C Programs Using SAT.
ανά: Clarke, E, κ.ά.
Έκδοση: (2004)

Predicate Abstraction of ANSI-C Programs Using SAT
ανά: Clarke, E, κ.ά.
Έκδοση: (2004)

Verifying C++ with STL Containers via Predicate Abstraction
ανά: Blanc, N, κ.ά.
Έκδοση: (2007)

Verifying C++ with STL containers via predicate abstraction
ανά: Blanc, N, κ.ά.
Έκδοση: (2007)

System verilog RTL modeling with embedded assertions /
ανά: Chow, Chee Siang, 1984-, κ.ά.
Έκδοση: (2012)

Verification of SpecC using Predicate Abstraction
ανά: Clarke, E, κ.ά.
Έκδοση: (2007)

Verification of SpecC using predicate abstraction.
ανά: Clarke, E, κ.ά.
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System verilog RTL modeling with embedded assertions[electronic resource] /
ανά: Chow, Chee Siang, 1984-, κ.ά.
Έκδοση: (2012)

Approximating Predicate Images for Bit−Vector Logic
ανά: Kroening, D, κ.ά.
Έκδοση: (2006)

The RTL design of 32-bit RISC processor using verilog HDL /
ανά: Hafizul Hasni Manab, 1987-, κ.ά.
Έκδοση: (2012)

Counterexamples with Loops for Predicate Abstraction
ανά: Kroening, D, κ.ά.
Έκδοση: (2006)

The RTL design of 32-bit RISC processor using verilog HDL [electronic resource] /
ανά: Hafizul Hasni Manab, 1987-
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Predicate Abstraction with Under-approximation Refinement
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The RTL design of 32-BIT 5- stage pipeline risc processor using verilog HDL /
ανά: Lim, Jonie Joo Nee, 1978-, κ.ά.
Έκδοση: (2008)

Verification and Falsification of Programs with Loops Using Predicate Abstraction
ανά: Kroening, D, κ.ά.
Έκδοση: (2009)

Verification and falsification of programs with loops using predicate abstraction.
ανά: Kroening, D, κ.ά.
Έκδοση: (2010)

Model Checking with Abstraction for Web Services
ανά: Sharygina, N, κ.ά.
Έκδοση: (2007)

The RTL design of 32-BIT 5- stage pipeline risc processor using verilog HDL [electronic resources] /
ανά: Lim, Jonie Joo Nee, 1978-, κ.ά.
Έκδοση: (2008)

Behavioral Consistency of C and Verilog Programs Using Bounded Model Checking
ανά: Kroening, D, κ.ά.
Έκδοση: (2003)

V2c – A Verilog to C translator
ανά: Mukherjee, R, κ.ά.
Έκδοση: (2016)

Strengthening properties using abstraction refinement
ανά: Purandare, M, κ.ά.
Έκδοση: (2009)

Specifying and Verifying Systems with Multiple Clocks
ανά: Clarke, E, κ.ά.
Έκδοση: (2003)

Specifying and verifying systems with multiple clocks
ανά: Clarke, E, κ.ά.
Έκδοση: (2003)

RTL cookbook/
ανά: 274324 Lancaster, Don
Έκδοση: (1969)

Counterexample Guided Abstraction Refinement via Program Execution
ανά: Groce, A, κ.ά.
Έκδοση: (2004)

RTL2RTL Formal Equivalence: Boosting the Design Confidence
ανά: M V Achutha Kiran Kumar, κ.ά.
Έκδοση: (2014-07-01)

Counterexample-guided abstraction refinement for symmetric concurrent programs
ανά: Donaldson, A, κ.ά.
Έκδοση: (2012)

Automated scripts for testing verilog designs with iVerilog
ανά: Ng, Gary Jia Hao
Έκδοση: (2015)