Real-time highly accurate dense depth on a power budget using an FPGA-CPU hybrid SoC
Obtaining highly accurate depth from stereo images in real time has many applications across computer vision and robotics, but in some contexts, upper bounds on power consumption constrain the feasible hardware to embedded platforms such as FPGAs. Whilst various stereo algorithms have been deployed...
| Main Authors: | , , , , , , , |
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| Format: | Journal article |
| Published: |
IEEE
2019
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