Design of a testchip for low cost IC testing.
With the continuous increase of the integration densities and complexities, the problem of testing integrated circuits has become much more acute and needs an economic solution with reliable performance. This paper presents the design of a TESTCHIP implementing a multiple polynomial, multiple seed b...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English English |
| Published: |
Taylor & Francis
2009
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| Online Access: | http://psasir.upm.edu.my/id/eprint/17691/1/Design%20of%20a%20testchip%20for%20low%20cost%20IC%20testing.pdf |