Reusable Automated Agent For Universal Verification Methodology System Testbench
Pre-silicon verification process is an important cog in an application specific integrated chip design cycle. It is considered one of the biggest bottle-neck in modern day design projects. Thus, verification efficiency and productivity has gained a lot of attention lately and will be the driving fac...
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| Format: | Thesis |
| Language: | English |
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2015
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| Online Access: | http://eprints.usm.my/40975/1/R._LOGEISH_RAJ_SO_RAJUMANIKAM_24_pages.pdf |