Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA
The purpose of this project is to design a prototype of an eight bits input output device based on FPGA. The input output device will have the same function as mode 0 of the 8255 input output chip that is already in the market today. The prototype contain three eight bits accessible ports ( por...
| Main Author: | |
|---|---|
| Format: | Monograph |
| Language: | English |
| Published: |
Universiti Sains Malaysia
2006
|
| Subjects: | |
| Online Access: | http://eprints.usm.my/58791/1/Peranti%20Masukan%20Dan%20Keluaran%208%20Bit%20Dengan%20Menggunakan%20FPGA_Mohd%20Pasha%20Abd%20Razak.pdf |