Skip to content
VuFind
English
Deutsch
Español
Français
Italiano
日本語
Nederlands
Português
Português (Brasil)
中文(简体)
中文（繁體）
Türkçe
עברית
Gaeilge
Cymraeg
Ελληνικά
Català
Euskara
Русский
Čeština
Suomi
Svenska
polski
Dansk
slovenščina
اللغة العربية
বাংলা
Galego
Tiếng Việt
Hrvatski
हिंदी
Հայերէն
Українська
Sámegiella
Монгол
Language
All Fields
Title
Author
Subject
Call Number
ISBN/ISSN
Tag
Find
Advanced
System level modelling of comp...
Cite this
Text this
Email this
Print
Export Record
Export to RefWorks
Export to EndNoteWeb
Export to EndNote
Permanent link
System level modelling of compressed memory architecture using system c
A compressed memory hierarchy using an indirect index cache.
Bibliographic Details
Main Authors:
Md. Yusof, Zulkifli
,
Khalil Hani, Mohamed
Format:
Conference or Workshop Item
Published:
2007
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Holdings
Description
Similar Items
Staff View
Similar Items
Compressed memory management modelling using SystemC
by: Md. Yusof, Zulkifli, et al.
Published: (2008)
SystemC-based electronic system level design methodology for SoC design-space exploration
by: Hau, Yuan Wen, et al.
Published: (2008)
Electronic system level (ESL) design methodology for IP-based system-on-chip (SoC)
by: Khalil-Hani, Mohamed, et al.
Published: (2007)
SystemC-based HW/SW co-simulation platform for system-on-chip (SoC) design space exploration
by: Hau, Y. W., et al.
Published: (2009)
Stream processor architecture – streaming memory system
by: Ngo, Wai Loon
Published: (2015)