Scaling and numerical simulation analysis of 50nm MOSFET incorporating dielectric pocket (DP-MOSFET)
Characterization of a metal-oxide-semiconductor field effect transistor (MOSFET) incorporating dielectric pocket (DP) for suppression of short-channel effect (SCE) was demonstrated by using numerical simulation. The DP was incorporated between the channel and source/drain of planar MOSFET and was sc...
| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Published: |
2007
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