Power-aware system-on-chip test scheduling using enhanced rectangle packing algorithm

The current semiconductor technology allows integration of all components onto a single chip called system-on-chip (SoC), which scales down the size of product and improves the performance. When a system becomes more complicated, testing process, such as test scheduling, becomes more challenging. Re...

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Bibliographic Details
Main Authors: Chia, Yee Ooi, Jia, Pao Sua, Siaw, Chen Lee
Format: Article
Published: Elsevier 2012
Subjects: