Substrate warpage analysis during solder reflow process

Bibliographic Details
Main Author: Beh , Keh Shin
Format: Thesis
Published: 2004
Subjects:
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author Beh , Keh Shin
author_facet Beh , Keh Shin
author_sort Beh , Keh Shin
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first_indexed 2024-03-05T19:08:59Z
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spelling utm.eprints-425392017-09-25T12:47:49Z http://eprints.utm.my/42539/ Substrate warpage analysis during solder reflow process Beh , Keh Shin TK Electrical engineering. Electronics Nuclear engineering 2004 Thesis NonPeerReviewed Beh , Keh Shin (2004) Substrate warpage analysis during solder reflow process. Masters thesis, Universiti Teknologi Malaysia, Faculty of Mechanical Engineering. http://libraryopac.utm.my/client/en_AU/main/search/detailnonmodal/ent:$002f$002fSD_ILS$002f0$002fSD_ILS:386994/one?qu=Substrate+warpage+analysis+during+solder+reflow+process
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Beh , Keh Shin
Substrate warpage analysis during solder reflow process
title Substrate warpage analysis during solder reflow process
title_full Substrate warpage analysis during solder reflow process
title_fullStr Substrate warpage analysis during solder reflow process
title_full_unstemmed Substrate warpage analysis during solder reflow process
title_short Substrate warpage analysis during solder reflow process
title_sort substrate warpage analysis during solder reflow process
topic TK Electrical engineering. Electronics Nuclear engineering
work_keys_str_mv AT behkehshin substratewarpageanalysisduringsolderreflowprocess