A review of the top of the barrier nanotransistor models for semiconductor nanomaterials
The modelling and simulation of low-dimensional nanoelectronic devices is important, because the semiconductor industry has scaled transistors down to the sub-10nm regime. The top of the barrier (ToB) transistor model has been developed and used to model transistors that are composed of various semi...
| Main Authors: | , , , , , , |
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| Format: | Article |
| Published: |
Elsevier Ltd.
2020
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