Modulo IP basado en FPGA para la decodificación de encoders de cuadratura

Modulo IP basado en FPGA para la decodificación de encoders de cuadratura

Los encoders de cuadratura son los sensores más ampliamente utilizados para medir la posición, velocidad y aceleración de motores. Para su correcto funcionamiento se requiere la implementación de circuitos de decodificación basados en el conteo de pulsos y la determinación de la dirección de rotació...

Full description

Bibliographic Details
Main Authors:	Andrés-David Suárez-Gómez, Wilson-Javier Pérez-Holguín
Format:	Article
Language:	English
Published:	Politécnico Colombiano Jaime Isaza Cadavid 2020-12-01
Series:	Revista Politécnica
Subjects:	encoder de cuadratura ip personalizada; fpga robótica
Online Access:	https://revistas.elpoli.edu.co/index.php/pol/article/view/1733

Similar Items

La cuadratura de la parábola según Thabit: una forma de análisis a partir de resultados cinemáticos
by: C. H. Wörner

Hardware Implementation of IP Packet Filtering in FPGA
by: Ana Cholakoska, et al.
Published: (2019-03-01)

A Chaotic IP Watermarking in Physical Layout Level Based on FPGA
by: W. Liang, et al.
Published: (2011-04-01)

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High-Resolution Encoder Interface
by: Naveen C, et al.
Published: (2024-01-01)

An FPGA Implementation of a Convolutional Auto-Encoder
by: Wei Zhao, et al.
Published: (2018-03-01)

An FPGA Platform for Next-Generation Grating Encoders
by: Yaodong Han, et al.
Published: (2020-04-01)

FPGA Implementation of IP Packet Header Parsing Hardware
by: Danijela Efnusheva, et al.
Published: (2017-03-01)

Design of Ultrasonic Flaw Detection Data Processing System Based on LabVIEW and FPGA
by: TAN Qunlin, et al.
Published: (2022-04-01)

The tool and the thing. From Daseins’ world to the world as fourhold (Geviert)
by: Adrián Bertorello
Published: (2018-08-01)

Efficient IP address retrieval using a novel octet based encoding technique for high speed lookup to improve network performance
by: Veeramani Sonai, et al.
Published: (2025-01-01)

El legado de John Coltrane: «Paz en la tierra»
by: Alberto Ciria
Published: (2019-08-01)

Study and design of region of interest encoding algorithm for HEVC based on FPGA
by: Li Shen, et al.
Published: (2018-07-01)

Strategi Optimalisasi Kecepatan dan Torka pada SRM Berbasis Deteksi Rotary Encoder dan FPGA
by: ARIFIN WIBISONO, et al.
Published: (2022-10-01)

La etapa superestructural de la integral
by: Daniel Steven Moran, et al.
Published: (2018-04-01)

Accurate FPGA-Based Velocity Measurement with an Incremental Encoder by a Fast Generalized Divisionless MT-Type Algorithm
by: Aleš Hace, et al.
Published: (2018-09-01)

Diseño de algoritmos basados en comportamientos para el control de minibots
by: Maritza Bracho de Rodríguez
Published: (2012-11-01)

Implementing a Quadrature NMR Spectrometer based on a passive RC splitter-combiner network
by: Dennis Cazar Ramírez, et al.
Published: (2011-12-01)

IP Lookup as a Critical Functionality of Packet Processors
by: Z. G. Čiča
Published: (2013-06-01)

Utilization of FPGA for Onboard Inference of Landmark Localization in CNN-Based Spacecraft Pose Estimation
by: Kiruki Cosmas, et al.
Published: (2020-11-01)

FPGA-Based Memristor Emulator Circuit for Binary Convolutional Neural Networks
by: Mohammed F. Tolba, et al.
Published: (2020-01-01)

Anti-packet-loss joint encoding for voice-over-IP steganography
by: Zhan-zhan GAO, et al.
Published: (2016-11-01)

Anti-packet-loss joint encoding for voice-over-IP steganography
by: Zhan-zhan GAO, et al.
Published: (2016-11-01)

FPGA Implementation of a Novel Multifunction Modulo (2<i><sup>n</sup></i> ± 1) Multiplier Using Radix-4 Booth Encoding Scheme
by: Chao-Tsung Kuo, et al.
Published: (2023-09-01)

Sistema basado en reglas para la generación personalizada de curso virtual
by: Néstor Darío Duque Méndez, et al.
Published: (2020-01-01)

FPGA Implementation of IPv6 Header Processor
by: Zdravko Todorov, et al.
Published: (2021-04-01)

Prototipo DAS basado en FPGA de 12 canales para monitoreo geodinámico
by: Wilson Enríquez, et al.
Published: (2018-06-01)

A Novel Divisionless MT-Type Velocity Estimation Algorithm for Efficient FPGA Implementation
by: Ales Hace, et al.
Published: (2018-01-01)

Generation of a genetically encoded voltage indicator MARINA reporter human iPS cell line using Cas9 (VULSCi002-A-2)
by: Aistė Petruškevičiūtė, et al.
Published: (2025-02-01)

FPGA implementation of IP packet segmentation and reassembly in internet router
by: Carević Marko, et al.
Published: (2009-01-01)

Empoderando el aprendizaje personalizado: Math solver como apoyo al aula invertida para estudiantes adultos vespertinos.
by: Gonzalo Donoso Gormaz
Published: (2024-05-01)

Pipeline Implementation of the Unified CORDIC Algorithm in FPGA
by: Wilson Javier Peréz-Holguín, et al.
Published: (2022-04-01)

The practice of the quadratura: the case of Lucas Valdés
by: Sara Fuentes Lázaro
Published: (2010-02-01)

MULTIMEDIA DATA TRANSMISSION THROUGH TCP/IP USING HASH BASED FEC WITH AUTO-XOR SCHEME
by: R. Shalin, et al.
Published: (2012-09-01)

Low Latency TOE with Double-Queue Structure for 10Gbps Ethernet on FPGA
by: Dan Yang, et al.
Published: (2023-05-01)

YOLOv4-Tiny-Based Coal Gangue Image Recognition and FPGA Implementation
by: Shanyong Xu, et al.
Published: (2022-11-01)

DESIGN OF ALGORITHMS BASED ON BEHAVIOUR FOR THE CONTROL OF MINIBOTS // DISEÑO DE ALGORITMOS BASADOS EN COMPORTAMIENTOS PARA EL CONTROL DE MINIBOTS
by: Maritza Bracho de Rodríguez
Published: (2012-12-01)

El “dataísmo” como fundamento de la publicidad digital personalizada
by: Rita María Pérez Pérez
Published: (2020-12-01)

La formación del gusto como paradigma de la educación personalizada
by: Javier Pérez Guerrero
Published: (2018-03-01)

Vectored-Bloom Filter for IP Address Lookup: Algorithm and Hardware Architectures
by: Hayoung Byun, et al.
Published: (2019-10-01)

Complex-Exponential-Based Bio-Inspired Neuron Model Implementation in FPGA Using Xilinx System Generator and Vivado Design Suite
by: Maruf Ahmad, et al.
Published: (2023-12-01)